Dedicated to support more innovative AI applications
AI CHIP CENTER FOR EMERGING SMART SYSTEMS
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Transnational<br>Consortium for R&D<br>on AI Chip Design
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Addresses compute, memory, and memory bandwidth scaling problems
Computing-in-Memory Architecture for Large-scale AI Models
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Advancing the field of algorithm-hardware co-design, addressing new challenges arising embodied AI applications
Hardware-Software<br>Co-Design for<br>Energy-Efficient and<br>High-Performance Edge AI
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Focus on supporting the chiplet and 3DIC-based designs, overcoming the limitations of existing EDA tools to enable more agile chip design
EDA for Large-Scale AI Hardware
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Achieve breakthrough performance leaps by leveraging advanced technologies developed
Cross-layer Optimization and Demonstration for Targeted Applications
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