Job Description
The AI Chip Centre for Emerging Smart Systems (ACCESS) is a multi-disciplinary center for advancing IC design and design automation technologies to enable novel data-centric computing paradigms supporting a wide range of AI applications. The research agenda in ACCESS is organized into four research programs, addressing four key technical areas, including 1) Enabling Technology for Emerging Computer Systems, 2) Architecture and Heterogeneous System Integration, 3) AI-Assisted EDA for AI Hardware, and 4) Hardware-Accelerated AI Applications.
Responsibilities
The Principal Engineer / Principal Architect will be involved in one of the research programs and will conduct collaborative research in one or multiple research projects in the Center. He/she should be hands-on in design and implementation tasks, as well as coaching junior research/engineer staff, in one or multiple research or R&D projects in the Center.
The Principal Engineers / Principal Architects are required to station and work at the Hong Kong Science Park, with occasional business travels to the HKUST Clear Water Bay Campus and other Collaborating Universities of the Center when needed.
Requirements
Applicants should have a PhD degree preferably in electronics, electrical or computer engineering, computer science, or equivalent, and at least 5 years of post-qualification experience in R&D; or MPhil / MSc degree holder plus 7 / 9 years’ experience equivalent respectively. In-depth knowledge and experience in integrated circuit design, design automation or broadly microelectronics are essential. Specifically, rich and hands-on R&D experiences as well as proficiency in design and implementation in at least one of the following area(s) with relevance to the design of AI accelerators are preferred (but not limited to):
- Digital SoC/ASIC design (front-end and back-end); FPGA prototyping; full-flow tape-out experience from architecture/specification to chip bring-up is highly desired;
- Analog/Mixed-signal IC design; layout design and verification; experiences in successful tape-out with advanced process node (e.g., 22nm) are preferable;
- Electronic design automation (EDA) algorithm design and optimization; architecture modeling and simulation; hardware design space exploration (DSE) and Hardware-software co-design;
- Compiler design and development (including IRs, front-end, back-end, auto-tuning, etc.); Experiences in NN compiler and toolchain (such as TVM, MLIR, nGraph, Glow, XLA, etc.) are preferable;
- Hardware-oriented machine learning algorithm design/NAS (such as DNN, RNN/LSTM/GRU, transformer, etc.) and optimization (such as compact model, quantization, sparsifying, etc.);
- Neuromorphic computing, compute-in-memory (CIM), non-volatile memory (CVM), silicon photonic devices, 3D integration, etc. with relevance to the design of AI accelerators.
The ideal candidate should have strong R&D capability and superior interpersonal and organizational skills. He/She should be an excellent team-player with a strong sense of responsibility, ability to multi-task and work independently, and a good command of written and spoken English. Outstanding verbal, written and presentation skills are also required.
Terms of Appointment
Starting salary will be commensurate with qualifications and experience. Fringe benefits including annual leave, medical and dental benefits will be provided.
ACCESS is an equal opportunity employer and welcomes applications from all qualified candidates.
Application Procedure
For applications/nominations together with a full curriculum vitae indicating their current and expected salaries, please send it to Ms Phoebe CHEUNG (hraccess@ust.hk). Review of applications will begin shortly and continue until the positions are filled. Only shortlisted candidates will be notified. *Please mark “PRIVATE & CONFIDENTIAL” and quote the position applied for and its reference number in the subject of the email.
(Information provided by applicants will be used for recruitment and other employment-related purposes.)